Ragavendra Natarajan

Contact: last-name[dot]first-name{at}google's email


 

 











 

About Me:

I received my PhD degree in Computer Science and Engineering from the University of Minnesota Twin Cities in 2015 under the supervision of Prof. Antonia Zhai. I've since worked on CPU front-end research at Intel's Processor Architecture Research Lab (PARL) in Bangalore. I am currently a server systems performance architect at AMD in Bangalore.

In an earlier life I worked on various aspects of the memory characteristics of multi-threaded applications. In particular, I worked on performance and correctness issues of multi-threaded applications running on multi-core processors. I explored the correctness issues during cross-ISA emulation of multi-threaded applications on multi-core processors. I also worked on designing sharing-aware cache replacement policies for multi-threaded programs.

My PhD thesis proposed applications of hardware support for transactional execution to tackle performance and correctness challenges in software.

 

Publications:

  • Leveraging Transactional Execution for Memory Consistency Model Emulation
    Ragavendra Natarajan and Antonia Zhai.
    To appear in ACM Transactions on Architecture and Code Optimization (ACM TACO), 2015.

  • Characterizing Multi-Threaded Applications for Designing Sharing-Aware Last-Level Cache Replacement Policies
    Ragavendra Natarajan and Mainak Chaudhuri.
    International Symposium on Workload Characterization (IISWC), 2013.

  • Effectiveness of Compiler-Directed Prefetching on Data Mining Benchmarks
    Ragavendra Natarajan, Vineeth Mekkat, Wei-Chung Hsu and Antonia Zhai.
    International Journal of Circuits, Systems and Computers (JCSC), 2012.

  • Performance Characterization of Data Mining Benchmarks
    Vineeth Mekkat, Ragavendra Natarajan, Wei-Chung Hsu and Antonia Zhai.
    Workshop on Interaction between Compilers and Computer Architectures(INTERACT-14), 2010.

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    Patents:

  • Dead Block Predictors for Cooperative Execution in the Last-Level Cache.
    Ragavendra Natarajan, Jayesh Gaur, Nithiyanandan Bashyam, Mainak Chaudhuri and Sreenivas Subramoney. April, 2013.
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    Education:

    Ph.D.       09/2010 - 05/2015.

        Department of Computer Science and Engineering. University of Minnesota Twin Cities, Minneapolis, USA.


    M.S.        09/2008 - 03/2015.

        Department of Computer Science and Engineering. University of Minnesota Twin Cities, Minneapolis, USA.


    B.Tech.      07/2004 - 05/2008.

        Department of Computer Science and Engineering, National Institute of Technology, Tiruchirappalli, India.